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SPECLED (LED)

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SpeCLED 2008 — Spreading of Current in Light Emitting Diodes, Software for 3D Modeling of Current Spreading and Temperature Distribution in LED chip

1. Software overview


Fig. 1. Basic design of 815×875 μm2 blue LED die
The device-engineer oriented software package SpeCLED (Spreading of Current in Light-Emitting Diodes) is intended for simulation of the current spreading and heat transfer in planar and vertical LED chips with complex electrode configuration. The package enables simulations of the integral parameters of the device like the forward voltage, output emission power, wall-plug efficiency, etc. as a function of the forward current. In addition, distribution of the current density, the internal quantum efficiency (IQE), and the temperature over the active region is computed. So, the software enables analysis of the current spreading effect on the chip performance.

The SpeCLED package has a friendly graphical user interface (GUI) aimed at minimization of the user efforts necessary for doing simulations. Using the GUI, a researcher can specify the LED chip design, generate and refine computational grid, change the default materials properties, run and monitor computations, and save/export the simulation results. Internal visualization tool, SimuLEDView, is available in the package to view the simulation results.


Fig. 2. Specification of the die geometry
Every LED chip is considered in the SpeCLED package as that fabricated by planar technology operations. This allows the layer-by-layer input of the actual 3D chip geometry, which is operative, pictorial, and easy-to-learn. Functionality of the layers specified by user serves as the basis for automatic generation of the boundary conditions on all internal interfaces of the chip. A prismatic grid, unstructured/structured in plane, is generated either automatically or manually. User is capable of the grid refining, if necessary, using the options provided within the GUI. Different blocks in the grid are recognized automatically and their properties are identified from the description of the constituent layers. A complex structure of semiconductor layers, including non-uniform doping and composition, may be allowed for by user-defined script functions.


Fig. 3. Automatic generation of the computational grid
In order to make simulations more efficient, the SpeCLED package uses a hybrid approach that distinguishes between thick quasi-neutral semiconductor regions far away from the active region and a relatively thin active region. A 3D model is employed to simulate the current spreading in the quasi-neutral regions where carrier drift dominates over diffusion. The active region is considered as an in-plane distributed non-linear resistor with known temperature-dependent j-U characteristics relating the local normal current density j with the p-n junction bias U applied to the active region. These characteristics may be either defined manually via special parameterized functions or imported from a set of external files. In particular, the j-U characteristics may be obtained from 1D simulations by the SiLENSe software tool (www.str-soft.com/products/SiLENSe/). The current spreading in metal electrodes/pads and semitransparent ITO layers is considered in SpeCLED self-consistently. The heat transfer analysis coupled with the current-spreading problem provides the temperature distribution inside the LED chip. The heat generation inside the chip is found with account of the current density distribution obtained from the current-spreading problem. The temperature effect on the active region characteristics, as well as on the impurity ionization in thick semiconductor layers is considered in simulations.


Fig. 4. Current density distribution in the active region
Progress in simulation is visualized in a solution-monitor window providing information on the current stage of computations. Current and temperature residuals are plotted to control the iteration convergence. The computation is stopped automatically when required solution accuracy is achieved. The user can also stop the computation and save the intermediate results.

Simulation results can be stored in ASCII files (*.cgs) and then viewed by the visualization tool SimuLEDView supplied within the SpeCLED package. The tool enables reviewing of 2D distributions of a number of variables in the active region plane and in different horizontal cross-sections of the die. The SimuLEDView tool allows export of the 2D distributions in a bmp-image format and of 1D distributions extracted for selected directions in a text-table format. SimuLEDView can also plot the I-V characteristic of the die, as well as IQE, EQE, and WPE as a function of the forward current.


Fig. 5. 2D distribution of Internal Quantum Efficiency
2. SpeCLED options

Current version of SpeCLED allows simulation of the current spreading in a planar or vertical LED chip coupled with the analysis of heat transfer. The software implements the physical models of electrical and thermal processes, based on the following assumptions:

  • Every LED chip is considered as a stack of epitaxial layers consequently formed on a substrate where some planar-technology operations are applied, like metal film deposition and mesa etching.
  • A planar (one-side electrode configuration) die is presented as a stack of the substrate (optionally), n-contact layer with etched mesa, active region, p-contact layer, n-electrode on the top surface of the mesa, p-electrode on the top surface of p-contact layer, n- and p-pads on the electrodes.
  • A vertical (two-side electrode configuration) die is presented as a stack of n-electrode on the bottom surface of the die, substrate (optionally), n-contact layer, active region, p-contact layer, p-electrode on the top surface of p-contact layer, n- and p-pads on the electrodes.
  • Optionally, semitransparent ITO layer and/or current blocking layers can be included into the chip design.
  • Active region of the LED is considered as in-plane distributed non-linear resistor with known temperature-dependent characteristics relating the local normal current density with the bias applied to the active layer. These characteristics may be either manually defined via special parameterized functions or imported from a set of external files. In particular, they can be generated by using the SiLENSe simulator.
  • Current spreading in the quasi-neutral regions of the LED chip is simulated within a 3D approach assuming the drift mechanism of the carrier transport to dominate.
  • Temperature effects on the electric conductivities of the quasi-neutral regions and on the local internal quantum efficiency of the active region are allowed for.
  • The heat-sink is modeled by user-specified heat-transfer coefficients assigned to the chip surfaces contacting with the heat-sink.


Fig. 6. Vectors of electric current in selected horizontal cross-section
The input of necessary data, building up of the chip geometry, grid generation and refinement, running and monitoring of simulation, and visualization of the results can be done via Graphical User Interface (GUI) and SimuLEDView visualization tool.

The SpeCLED software is supplied with the user manual and description of physical model.

3. Compatibility

The SpeCLED package can import the input data generated by the SiLENSe (version 2.0 or higher), which is a 1D simulator of band diagram, carrier transport, and light emission in an LED heterostructure. More info about the SiLENSe software is available at SiLENSe page.

Files with results of computations generated by SpeCLED package can be used as input data for RATRO, a 3D software tool for simulation of the light extraction from the LED chip by means of ray-tracing.

4. Support

Hot-line support is provided for customers. The support includes free of charge supply of updated versions released during the license period and technical consulting on SpeCLED operation.

5. Key Publications

 

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